FPGA Market

GAL20VP8B-25LJ

Lattice SPLD GAL

8 macrocells 28-pin

AvailableLifecycle: Active

The GAL20VP8B-25LJ is a Lattice SPLD GAL based on the GAL20VP8B device, with 8 macrocells. It comes in the LJ package (28-PLCC, 11.51 × 11.51 mm), speed grade 25. It is in active production.

Macrocells
8
Pins
28
Speed grade
25

Part details

Manufacturer
Lattice Semiconductor
Part number
GAL20VP8B-25LJ
Base device
GAL20VP8B
Family
SPLD GAL
Package
LJ
Pin / ball count
28
Speed grade
25
Product status
Active
ECCN
EAR99
HTS code
8542.31.0065
RoHS
Not compliant

Device specifications

Specifications

Package outline
28-PLCC, 11.51 × 11.51 mm
Package / case
28-LCC (J-Lead)
Mounting
Surface Mount
Macrocells
8
Programming
EE PLD
Speed
25 ns
Moisture sensitivity (MSL)
Level 1 (unlimited)
Series
GAL20VP8

Part number breakdown

SegmentFieldMeaning
GAL20VP8BBase DeviceDevice GAL20VP8B
25Speed Grade25
LJPackageLJ

Alternatives and other versions

Part numberHow it comparesPackageSpeedTemperature
GAL20VP8B-15LJSame device, different speed gradeLJ15
GAL20VP8B-15LPSame device, different packageLP15

Ranked from manufacturer datasheets and pinout files. Customer approval still recommended.

Frequently asked questions

Is the GAL20VP8B-25LJ still in production?
Yes. The GAL20VP8B-25LJ is in active production.
What package is the GAL20VP8B-25LJ?
The GAL20VP8B-25LJ comes in the LJ package (28-PLCC, 11.51 × 11.51 mm).

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